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Interupts and ISR in the FDE
The role of interrupts in the Fetch Decode Execute cycle
At any particular time, the CPU will be in the middle of carrying out a Fetch Decode Execute cycle. When a particular interrupt happens, the signal sent causes the correct bit in the interrupt register to be made a 'one'.
Suggested Video #1
Additional Reading
https://en.wikipedia.org/wiki/Interrupt
http://www.ece.utep.edu/courses/web3376/Notes_files/ee3376-interrupts_stack.pdf