D Type Flip Flops

In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information – a bistable multivibrator.

(Above) Layout for the silicon implementation of a six transistor SRAM memory cell.

The D flip-flop is an edge triggered device which transfers input data to Q on clock rising or falling edge. Data Latches are level sensitive devices such as the data latch and the transparent latch.

A D-type flip-flop consists of four inputs:

• Data input
• Clock input
• Set input
• Reset input

It also has two outputs, with one being logically inverse of other. The data input is either logic 0 or 1, meaning low or high voltage. 

Suggested Videos

Recommended Video for theory: https://youtu.be/RP00R9uf004

Additional definition and information

The D flip-flop tracks the input, making transitions with match those of the input D. The D stands for "data"; this flip-flop stores the value that is on the data line. It can be thought of as a basic memory cell. A D flip-flop can be made from a set/reset flip-flop by tying the set to the reset through an inverter. The result may be clocked.

The D Flip Flop is by far the most important of the clocked flip-flops as it ensures that ensures that inputs S and R are never equal to one at the same time. The D-type flip flop are constructed from a gated SR flip-flop with an inverter added between the S and the R inputs to allow for a single D (Data) input.

Why is it called the D Type Flip Flop?

The Q output always takes on the state of the D input at the moment of a rising clock edge. (or falling edge if the clock input is active low) It is called the D flip-flop for this reason, since the output takes the value of the D input or Data input, and Delays it by one clock count.